When the number of bits of a signal (for example, an address signal) to be decoded by a decoder is large, it is possible to reduce the circuit size of the decoder by employing a pre-decoding method in which a signal to be decoded is divided into a plurality of bit sections and the signal is decoded for each bit section. For example, in a memory device such as a DRAM, there is a case of employing a method in which any one of a plurality of memory mats is selected by decoding an upper bit section of a row address and a lower bit section of the row address is decoded, thereby selecting any one of a plurality of word lines included in the selected memory mat. This method is very effective when the number of memory mats is a number that can be expressed as a power of 2; however, if the number of memory mats is a number that cannot be expressed as a power of 2, the number of bits of the upper bit section to be used for selection of memory mats becomes large. Therefore, in some cases, the circuit size of the decoder becomes large and its decoding speed becomes slow.